Post-fabrication frequency trimming of coplanar-waveguide resonators in circuit QED quantum processors

  1. S. Vallés-Sanclemente,
  2. S. L. M. van der Meer,
  3. M. Finkel,
  4. N. Muthusubramanian,
  5. M. Beekman,
  6. H. Ali,
  7. J. F. Marques,
  8. C. Zachariadis,
  9. H. M. Veen,
  10. T. Stavenga,
  11. N. Haider,
  12. and L. DiCarlo
We present the use of grounding airbridge arrays to trim the frequency of microwave coplanar-waveguide (CPW) resonators post fabrication. This method is compatible with the fabrication
steps of conventional CPW airbridges and crossovers and increases device yield by allowing compensation of design and fabrication uncertainty with 100 MHz range and 10 MHz resolution. We showcase two applications in circuit QED. The first is elimination of frequency crowding between resonators intended to readout different transmons by frequency-division multiplexing. The second is frequency matching of readout and Purcell-filter resonator pairs. Combining this matching with transmon frequency trimming by laser annealing reliably achieves fast and high-fidelity readout across 17-transmon quantum processors.

All-microwave leakage reduction units for quantum error correction with superconducting transmon qubits

  1. J. F. Marques,
  2. H. Ali,
  3. B. M. Varbanov,
  4. M. Finkel,
  5. H. M. Veen,
  6. S. L. M. van der Meer,
  7. S. Valles-Sanclemente,
  8. N. Muthusubramanian,
  9. M. Beekman,
  10. N. Haider,
  11. B. M. Terhal,
  12. and L. DiCarlo
Minimizing leakage from computational states is a challenge when using many-level systems like superconducting quantum circuits as qubits. We realize and extend the quantum-hardware-efficient,
all-microwave leakage reduction unit (LRU) for transmons in a circuit QED architecture proposed by Battistel et al. This LRU effectively reduces leakage in the second- and third-excited transmon states with up to 99% efficacy in 220 ns, with minimum impact on the qubit subspace. As a first application in the context of quantum error correction, we demonstrate the ability of multiple simultaneous LRUs to reduce the error detection rate and to suppress leakage buildup within 1% in data and ancilla qubits over 50 cycles of a weight-2 parity measurement.

Realization of a quantum neural network using repeat-until-success circuits in a superconducting quantum processor

  1. M. S. Moreira,
  2. G. G. Guerreschi,
  3. W. Vlothuizen,
  4. J. F. Marques,
  5. J. van Straten,
  6. S. P. Premaratne,
  7. X. Zou,
  8. H. Ali,
  9. N. Muthusubramanian,
  10. C. Zachariadis,
  11. J. van Someren,
  12. M. Beekman,
  13. N. Haider,
  14. A. Bruno,
  15. C. G. Almudever,
  16. A. Y. Matsuura,
  17. and L. DiCarlo
Artificial neural networks are becoming an integral part of digital solutions to complex problems. However, employing neural networks on quantum processors faces challenges related
to the implementation of non-linear functions using quantum circuits. In this paper, we use repeat-until-success circuits enabled by real-time control-flow feedback to realize quantum neurons with non-linear activation functions. These neurons constitute elementary building blocks that can be arranged in a variety of layouts to carry out deep learning tasks quantum coherently. As an example, we construct a minimal feedforward quantum neural network capable of learning all 2-to-1-bit Boolean functions by optimization of network activation parameters within the supervised-learning paradigm. This model is shown to perform non-linear classification and effectively learns from multiple copies of a single training state consisting of the maximal superposition of all inputs.

Logical-qubit operations in an error-detecting surface code

  1. J. F. Marques,
  2. B. M. Varbanov,
  3. M. S. Moreira,
  4. H. Ali,
  5. N. Muthusubramanian,
  6. C. Zachariadis,
  7. F. Battistel,
  8. M. Beekman,
  9. N. Haider,
  10. W. Vlothuizen,
  11. A. Bruno,
  12. B. M. Terhal,
  13. and L. DiCarlo
We realize a suite of logical operations on a distance-two logical qubit stabilized using repeated error detection cycles. Logical operations include initialization into arbitrary states,
measurement in the cardinal bases of the Bloch sphere, and a universal set of single-qubit gates. For each type of operation, we observe higher performance for fault-tolerant variants over non-fault-tolerant variants, and quantify the difference through detailed characterization. In particular, we demonstrate process tomography of logical gates, using the notion of a logical Pauli transfer matrix. This integration of high-fidelity logical operations with a scalable scheme for repeated stabilization is a milestone on the road to quantum error correction with higher-distance superconducting surface codes.

Variational preparation of finite-temperature states on a quantum computer

  1. R. Sagastizabal,
  2. S. P. Premaratne,
  3. B. A. Klaver,
  4. M. A. Rol,
  5. V. Negîrneac,
  6. M. Moreira,
  7. X. Zou,
  8. S. Johri,
  9. N. Muthusubramanian,
  10. M. Beekman,
  11. C. Zachariadis,
  12. V.P. Ostroukh,
  13. N. Haider,
  14. A. Bruno,
  15. A. Y. Matsuura,
  16. and L. DiCarlo
The preparation of thermal equilibrium states is important for the simulation of condensed-matter and cosmology systems using a quantum computer. We present a method to prepare such
mixed states with unitary operators, and demonstrate this technique experimentally using a gate-based quantum processor. Our method targets the generation of thermofield double states using a hybrid quantum-classical variational approach motivated by quantum-approximate optimization algorithms, without prior calculation of optimal variational parameters by numerical simulation. The fidelity of generated states to the thermal-equilibrium state smoothly varies from 99 to 75% between infinite and near-zero simulated temperature, in quantitative agreement with numerical simulations of the noisy quantum processor with error parameters drawn from experiment.

High-fidelity controlled-Z gate with maximal intermediate leakage operating at the speed limit in a superconducting quantum processor

  1. V. Negîrneac,
  2. H. Ali,
  3. N. Muthusubramanian,
  4. F. Battistel,
  5. R. Sagastizabal,
  6. M. S. Moreira,
  7. J. F. Marques,
  8. W. Vlothuizen,
  9. M. Beekman,
  10. N. Haider,
  11. A. Bruno,
  12. and L. DiCarlo
We introduce the sudden variant (SNZ) of the Net Zero scheme realizing controlled-Z (CZ) gates by baseband flux control of transmon frequency. SNZ CZ gates operate at the speed limit
of transverse coupling between computational and non-computational states by maximizing intermediate leakage. The key advantage of SNZ is tuneup simplicity, owing to the regular structure of conditional phase and leakage as a function of two control parameters. We realize SNZ CZ gates in a multi-transmon processor, achieving 99.93±0.24% fidelity and 0.10±0.02% leakage. SNZ is compatible with scalable schemes for quantum error correction and adaptable to generalized conditional-phase gates useful in intermediate-scale applications.

Error Mitigation by Symmetry Verification on a Variational Quantum Eigensolver

  1. R. Sagastizabal,
  2. X. Bonet-Monroig,
  3. M. Singh,
  4. M. A. Rol,
  5. C. C. Bultink,
  6. X. Fu,
  7. C.H. Price,
  8. V.P. Ostroukh,
  9. N. Muthusubramanian,
  10. A. Bruno,
  11. M. Beekman,
  12. N. Haider,
  13. T. E. O'Brien,
  14. and L. DiCarlo
Variational quantum eigensolvers offer a small-scale testbed to demonstrate the performance of error mitigation techniques with low experimental overhead. We present successful error
mitigation by applying the recently proposed symmetry verification technique to the experimental estimation of the ground-state energy and ground state of the hydrogen molecule. A finely adjustable exchange interaction between two qubits in a circuit QED processor efficiently prepares variational ansatz states in the single-excitation subspace respecting the parity symmetry of the qubit-mapped Hamiltonian. Symmetry verification improves the energy and state estimates by mitigating the effects of qubit relaxation and residual qubit excitation, which violate the symmetry. A full-density-matrix simulation matching the experiment dissects the contribution of these mechanisms from other calibrated error sources. Enforcing positivity of the measured density matrix via scalable convex optimization correlates the energy and state estimate improvements when using symmetry verification, with interesting implications for determining system properties beyond the ground-state energy.

General method for extracting the quantum efficiency of dispersive qubit readout in circuit QED

  1. C. C. Bultink,
  2. B. Tarasinski,
  3. N. Haandbaek,
  4. S. Poletto,
  5. N. Haider,
  6. D. J. Michalak,
  7. A. Bruno,
  8. and L. DiCarlo
We present and demonstrate a general 3-step method for extracting the quantum efficiency of dispersive qubit readout in circuit QED. We use active depletion of post-measurement photons
and optimal integration weight functions on two quadratures to maximize the signal-to-noise ratio of non-steady-state homodyne measurement. We derive analytically and demonstrate experimentally that the method robustly extracts the quantum efficiency for arbitrary readout conditions in the linear regime. We use the proven method to optimally bias a Josephon traveling-wave parametric amplifier and to quantify the different noise contributions in the readout amplification chain.

Scalable quantum circuit and control for a superconducting surface code

  1. R. Versluis,
  2. S. Poletto,
  3. N. Khammassi,
  4. N. Haider,
  5. D. J. Michalak,
  6. A. Bruno,
  7. K. Bertels,
  8. and L. DiCarlo
We present a scalable scheme for executing the error-correction cycle of a monolithic surface-code fabric composed of fast-flux-tuneable transmon qubits with nearest-neighbor coupling.
An eight-qubit unit cell forms the basis for repeating both the quantum hardware and coherent control, enabling spatial multiplexing. This control uses three fixed frequencies for all single-qubit gates and a unique frequency detuning pattern for each qubit in the cell. By pipelining the interaction and readout steps of ancilla-based X- and Z-type stabilizer measurements, we can engineer detuning patterns that avoid all second-order transmon-transmon interactions except those exploited in controlled-phase gates, regardless of fabric size. Our scheme is applicable to defect-based and planar logical qubits, including lattice surgery.