Wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions for superconducting quantum processors

  1. N. Muthusubramanian,
  2. P. Duivestein,
  3. C. Zachariadis,
  4. M. Finkel,
  5. S. L. M. van der Meer,
  6. H. M. Veen,
  7. M. W. Beekman,
  8. T. Stavenga,
  9. A. Bruno,
  10. and L. DiCarlo
We investigate die-level and wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan Josephson junctions, using multiple substrates with and without through-silicon vias (TSVs).
Dolan junctions fabricated on planar substrates have the highest yield and lowest room-temperature conductance spread, equivalent to ~100 MHz in transmon frequency. In TSV-integrated substrates, Dolan junctions suffer most in both yield and disorder, making Manhattan junctions preferable. Manhattan junctions show pronounced conductance decrease from wafer centre to edge, which we qualitatively capture using a geometric model of spatially-dependent resist shadowing during junction electrode evaporation. Analysis of actual junction overlap areas using scanning electron micrographs supports the model, and further points to a remnant spatial dependence possibly due to contact resistance.

Post-fabrication frequency trimming of coplanar-waveguide resonators in circuit QED quantum processors

  1. S. Vallés-Sanclemente,
  2. S. L. M. van der Meer,
  3. M. Finkel,
  4. N. Muthusubramanian,
  5. M. Beekman,
  6. H. Ali,
  7. J. F. Marques,
  8. C. Zachariadis,
  9. H. M. Veen,
  10. T. Stavenga,
  11. N. Haider,
  12. and L. DiCarlo
We present the use of grounding airbridge arrays to trim the frequency of microwave coplanar-waveguide (CPW) resonators post fabrication. This method is compatible with the fabrication
steps of conventional CPW airbridges and crossovers and increases device yield by allowing compensation of design and fabrication uncertainty with 100 MHz range and 10 MHz resolution. We showcase two applications in circuit QED. The first is elimination of frequency crowding between resonators intended to readout different transmons by frequency-division multiplexing. The second is frequency matching of readout and Purcell-filter resonator pairs. Combining this matching with transmon frequency trimming by laser annealing reliably achieves fast and high-fidelity readout across 17-transmon quantum processors.

All-microwave leakage reduction units for quantum error correction with superconducting transmon qubits

  1. J. F. Marques,
  2. H. Ali,
  3. B. M. Varbanov,
  4. M. Finkel,
  5. H. M. Veen,
  6. S. L. M. van der Meer,
  7. S. Valles-Sanclemente,
  8. N. Muthusubramanian,
  9. M. Beekman,
  10. N. Haider,
  11. B. M. Terhal,
  12. and L. DiCarlo
Minimizing leakage from computational states is a challenge when using many-level systems like superconducting quantum circuits as qubits. We realize and extend the quantum-hardware-efficient,
all-microwave leakage reduction unit (LRU) for transmons in a circuit QED architecture proposed by Battistel et al. This LRU effectively reduces leakage in the second- and third-excited transmon states with up to 99% efficacy in 220 ns, with minimum impact on the qubit subspace. As a first application in the context of quantum error correction, we demonstrate the ability of multiple simultaneous LRUs to reduce the error detection rate and to suppress leakage buildup within 1% in data and ancilla qubits over 50 cycles of a weight-2 parity measurement.

Lower-temperature fabrication of airbridges by grayscale lithography to increase yield of nanowire transmons in circuit QED quantum processors

  1. T. Stavenga,
  2. and L. DiCarlo
Quantum hardware based on circuit quantum electrodynamics makes extensive use of airbridges to suppress unwanted modes of wave propagation in coplanar-waveguide transmission lines.
Airbridges also provide an interconnect enabling transmission lines to cross. Traditional airbridge fabrication produces a curved profile by reflowing resist at elevated temperature prior to metallization. The elevated temperature can affect the coupling energy and even yield of pre-fabricated Josephson elements of superconducting qubits, tuneable couplers and resonators. We employ grayscale lithography in place of reflow to reduce the peak airbridge processing temperature from 200 to 150∘C, showing a substantial yield increase of transmon qubits with Josephson elements realized using Al-contacted InAs nanowires.

Realization of a quantum neural network using repeat-until-success circuits in a superconducting quantum processor

  1. M. S. Moreira,
  2. G. G. Guerreschi,
  3. W. Vlothuizen,
  4. J. F. Marques,
  5. J. van Straten,
  6. S. P. Premaratne,
  7. X. Zou,
  8. H. Ali,
  9. N. Muthusubramanian,
  10. C. Zachariadis,
  11. J. van Someren,
  12. M. Beekman,
  13. N. Haider,
  14. A. Bruno,
  15. C. G. Almudever,
  16. A. Y. Matsuura,
  17. and L. DiCarlo
Artificial neural networks are becoming an integral part of digital solutions to complex problems. However, employing neural networks on quantum processors faces challenges related
to the implementation of non-linear functions using quantum circuits. In this paper, we use repeat-until-success circuits enabled by real-time control-flow feedback to realize quantum neurons with non-linear activation functions. These neurons constitute elementary building blocks that can be arranged in a variety of layouts to carry out deep learning tasks quantum coherently. As an example, we construct a minimal feedforward quantum neural network capable of learning all 2-to-1-bit Boolean functions by optimization of network activation parameters within the supervised-learning paradigm. This model is shown to perform non-linear classification and effectively learns from multiple copies of a single training state consisting of the maximal superposition of all inputs.

Logical-qubit operations in an error-detecting surface code

  1. J. F. Marques,
  2. B. M. Varbanov,
  3. M. S. Moreira,
  4. H. Ali,
  5. N. Muthusubramanian,
  6. C. Zachariadis,
  7. F. Battistel,
  8. M. Beekman,
  9. N. Haider,
  10. W. Vlothuizen,
  11. A. Bruno,
  12. B. M. Terhal,
  13. and L. DiCarlo
We realize a suite of logical operations on a distance-two logical qubit stabilized using repeated error detection cycles. Logical operations include initialization into arbitrary states,
measurement in the cardinal bases of the Bloch sphere, and a universal set of single-qubit gates. For each type of operation, we observe higher performance for fault-tolerant variants over non-fault-tolerant variants, and quantify the difference through detailed characterization. In particular, we demonstrate process tomography of logical gates, using the notion of a logical Pauli transfer matrix. This integration of high-fidelity logical operations with a scalable scheme for repeated stabilization is a milestone on the road to quantum error correction with higher-distance superconducting surface codes.

Variational preparation of finite-temperature states on a quantum computer

  1. R. Sagastizabal,
  2. S. P. Premaratne,
  3. B. A. Klaver,
  4. M. A. Rol,
  5. V. Negîrneac,
  6. M. Moreira,
  7. X. Zou,
  8. S. Johri,
  9. N. Muthusubramanian,
  10. M. Beekman,
  11. C. Zachariadis,
  12. V.P. Ostroukh,
  13. N. Haider,
  14. A. Bruno,
  15. A. Y. Matsuura,
  16. and L. DiCarlo
The preparation of thermal equilibrium states is important for the simulation of condensed-matter and cosmology systems using a quantum computer. We present a method to prepare such
mixed states with unitary operators, and demonstrate this technique experimentally using a gate-based quantum processor. Our method targets the generation of thermofield double states using a hybrid quantum-classical variational approach motivated by quantum-approximate optimization algorithms, without prior calculation of optimal variational parameters by numerical simulation. The fidelity of generated states to the thermal-equilibrium state smoothly varies from 99 to 75% between infinite and near-zero simulated temperature, in quantitative agreement with numerical simulations of the noisy quantum processor with error parameters drawn from experiment.

High-fidelity controlled-Z gate with maximal intermediate leakage operating at the speed limit in a superconducting quantum processor

  1. V. Negîrneac,
  2. H. Ali,
  3. N. Muthusubramanian,
  4. F. Battistel,
  5. R. Sagastizabal,
  6. M. S. Moreira,
  7. J. F. Marques,
  8. W. Vlothuizen,
  9. M. Beekman,
  10. N. Haider,
  11. A. Bruno,
  12. and L. DiCarlo
We introduce the sudden variant (SNZ) of the Net Zero scheme realizing controlled-Z (CZ) gates by baseband flux control of transmon frequency. SNZ CZ gates operate at the speed limit
of transverse coupling between computational and non-computational states by maximizing intermediate leakage. The key advantage of SNZ is tuneup simplicity, owing to the regular structure of conditional phase and leakage as a function of two control parameters. We realize SNZ CZ gates in a multi-transmon processor, achieving 99.93±0.24% fidelity and 0.10±0.02% leakage. SNZ is compatible with scalable schemes for quantum error correction and adaptable to generalized conditional-phase gates useful in intermediate-scale applications.

Leakage detection for a transmon-based surface code

  1. B. M. Varbanov,
  2. F. Battistel,
  3. B. M. Tarasinski,
  4. V.P. Ostroukh,
  5. T. E. O'Brien,
  6. L. DiCarlo,
  7. and B. M. Terhal
Leakage outside of the qubit computational subspace, present in many leading experimental platforms, constitutes a threatening error for quantum error correction (QEC) for qubits. We
develop a leakage-detection scheme via Hidden Markov models (HMMs) for transmon-based implementations of the surface code. By performing realistic density-matrix simulations of the distance-3 surface code (Surface-17), we observe that leakage is sharply projected and leads to an increase in the surface-code defect probability of neighboring stabilizers. Together with the analog readout of the ancilla qubits, this increase enables the accurate detection of the time and location of leakage. We restore the logical error rate below the memory break-even point by post-selecting out leakage, discarding about 47% of the data. Leakage detection via HMMs opens the prospect for near-term QEC demonstrations, targeted leakage reduction and leakage-aware decoding and is applicable to other experimental platforms.

Time-domain characterization and correction of on-chip distortion of control pulses in a quantum processor

  1. M. A. Rol,
  2. L. Ciorciaro,
  3. F. K. Malinowski,
  4. B. M. Tarasinski,
  5. R. E. Sagastizabal,
  6. C. C. Bultink,
  7. Y. Salathe,
  8. N. Haandbaek,
  9. J. Sedivy,
  10. and L. DiCarlo
We introduce Cryoscope, a method for sampling on-chip baseband pulses used to dynamically control qubit frequency in a quantum processor. We specifically use Cryoscope to measure the
step response of the dedicated flux control lines of two-junction transmon qubits in circuit QED processors with the temporal resolution of the room-temperature arbitrary waveform generator producing the control pulses. As a first application, we iteratively improve this step response using optimized real-time digital filters to counter the linear-dynamical distortion in the control line, as needed for high-fidelity, repeatable one- and two-qubit gates based on dynamical control of qubit frequency.