eQASM: An Executable Quantum Instruction Set Architecture

  1. X. Fu,
  2. L. Riesebos,
  3. M. A. Rol,
  4. J. van Straten,
  5. J. van Someren,
  6. N. Khammassi,
  7. I. Ashraf,
  8. R.F.L. Vermeulen,
  9. V. Newsum,
  10. K. K. L. Loh,
  11. J. C. de Sterke,
  12. W. J. Vlothuizen,
  13. R. N. Schouten,
  14. C. G. Almudever,
  15. L. DiCarlo,
  16. and K. Bertels
Bridging the gap between quantum software and hardware, recent research proposed a quantum control microarchitecture QuMA which implements the quantum microinstruction set QuMIS. However,
QuMIS does not offer feedback control, and is tightly bound to the hardware implementation. Also, as the number of qubits grows, QuMA cannot fetch and execute instructions fast enough to apply all operations on qubits on time. Known as the quantum operation issue rate problem, this limitation is aggravated by the low information density of QuMIS instructions. In this paper, we propose an executable quantum instruction set architecture (QISA), called eQASM, that can be translated from the quantum assembly language (QASM), supports feedback, and is executed on a quantum control microarchitecture. eQASM alleviates the quantum operation issue rate problem by efficient timing specification, single-operation-multiple-qubit execution, and a very-long-instruction-word architecture. The definition of eQASM focuses on the assembly level to be expressive. Quantum operations are configured at compile time instead of being defined at QISA design time. We instantiate eQASM into a 32-bit instruction set targeting a seven-qubit superconducting quantum processor. We validate our design by performing several experiments on a two-qubit quantum processor.

An Experimental Microarchitecture for a Superconducting Quantum Processor

  1. X. Fu,
  2. M. A. Rol,
  3. C. C. Bultink,
  4. J. van Someren,
  5. N. Khammassi,
  6. I. Ashraf,
  7. R.F.L. Vermeulen,
  8. J. C. de Sterke,
  9. W. J. Vlothuizen,
  10. R. N. Schouten,
  11. C. G. Almudever,
  12. L. DiCarlo,
  13. and K. Bertels
Quantum computers promise to solve certain problems that are intractable for classical computers, such as factoring large numbers and simulating quantum systems. To date, research in
quantum computer engineering has focused primarily at opposite ends of the required system stack: devising high-level programming languages and compilers to describe and optimize quantum algorithms, and building reliable low-level quantum hardware. Relatively little attention has been given to using the compiler output to fully control the operations on experimental quantum processors. Bridging this gap, we propose and build a prototype of a flexible control microarchitecture supporting quantum-classical mixed code for a superconducting quantum processor. The microarchitecture is based on three core elements: (i) a codeword-based event control scheme, (ii) queue-based precise event timing control, and (iii) a flexible multilevel instruction decoding mechanism for control. We design a set of quantum microinstructions that allows flexible control of quantum operations with precise timing. We demonstrate the microarchitecture and microinstruction set by performing a standard gate-characterization experiment on a transmon qubit.

Scalable quantum circuit and control for a superconducting surface code

  1. R. Versluis,
  2. S. Poletto,
  3. N. Khammassi,
  4. N. Haider,
  5. D. J. Michalak,
  6. A. Bruno,
  7. K. Bertels,
  8. and L. DiCarlo
We present a scalable scheme for executing the error-correction cycle of a monolithic surface-code fabric composed of fast-flux-tuneable transmon qubits with nearest-neighbor coupling.
An eight-qubit unit cell forms the basis for repeating both the quantum hardware and coherent control, enabling spatial multiplexing. This control uses three fixed frequencies for all single-qubit gates and a unique frequency detuning pattern for each qubit in the cell. By pipelining the interaction and readout steps of ancilla-based X- and Z-type stabilizer measurements, we can engineer detuning patterns that avoid all second-order transmon-transmon interactions except those exploited in controlled-phase gates, regardless of fabric size. Our scheme is applicable to defect-based and planar logical qubits, including lattice surgery.